18951503088
股票代码:688601

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国内模拟芯片龙头企业—品质保障|免费样品|辅助选型|技术支持
Product
picture
PartNumber
VCC (V)
请选择
请选择
0.8~3.6
1.65~5.5
1.6~5.5
2.0~5.5
2.0~6.0
2.3~5.5
2~5.5
2~6
4.5~5.5
ICC (μA)
请选择
请选择
<10
<160
<20
<3
<4
<40
<80
-0.7~0.7
-1.0~1.0
-3~3
/
1
10
Describe & Features
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1-of-2 Decoder and Demultiplexer
1-of-2 Demultiplexer / Decoder
2-input AND gate
3 To 8 Line Decoder Demultiplexer
3-Input Positive-NOR Gate
3-To-8 Line Decoder/Demultiplexer
3-to-8 Decoder/Demultiplexer
8 Bits Octal 3-State Non-Inverting Bus Transceiver
8-Bit Parallel-Load Shift Registers
8-Bit Parallel-Out Serial Shift Registers
8-Bit Shift Registers With 3-State Output Registers
8-Bit Shift Registers with Output Latches
8-Ch Buffers With 3-State Outputs
8-bit Parallel-out Serial Shift Registers
Configurable Multiple Function Gate
Driver with 3-State Output
Dual 2-Input AND Gate
Dual 2-Input NAND Gate With Open-Drain Outputs
Dual 2-Input NOR Gate
Dual 2-Input Positive-AND Gate
Dual 2-Input Positive-NAND Gate
Dual 2-Input Positive-OR Gate
Dual 2-Input XOR Gate
Dual Buffer
Dual Buffer Driver With 3-State Outputs
Dual Buffer Driver with 3-State Outputs
Dual Buffer Gate
Dual Buffer with Open Drain Output
Dual Buffer with Schmitt-Trigger Inputs
Dual Buffer with Schmitt−Trigger Inputs
Dual Bus Buffer Gate With 3-State Output
Dual Bus Buffer Gate With 3-State Outputs
Dual Inverter
Dual Inverter Gate
Dual Inverter with Open Drain Output
Dual Inverter with Schmitt Trigger
Dual Inverter with Schmitt-Trigger Inputs
Dual Inverter with Schmitt−Trigger Inputs
Dual Schmitt Trigger Buffer
Dual buffer gate
Hex Buffer and Driver With Open-Drain Outputs
Hex Inverter Buffer and Driver With Open-Drain Outputs
Hex Inverter with Schmitt Trigger
Hex Inverters
Hex Non-Inverting Buffer
Hex Schmidt-Trigger Inverters
Hex Schmitt trigger inverter
Hex Schmitt-Triggered Buffer
Hex inverter buffer/driver With open drain outputs
Inverting Buffer with Schmitt-Trigger Input and Open-Drain Output
Low-Power Configurable Multiple Function Gate
Low-Power Dual Buffer gate
Low-Power Dual Inverter Gate
Low-Power Dual Inverter with Schmitt trigger
Low-Power Dual Schmitt trigger buffer
Low-Power Single 2-Input AND Gate
Low-Power Single 2-Input OR Gate
Low-Power Single Buffer Gate
Low-Power Single Bus Buffer Gate With 3-State Output
Low-Power Single Schmitt-Trigger Buffer
Low-Power Single Schmitt-Trigger Inverter
Low-power 2-input OR-gate
Low-power Configurable Multiple Function Gate
Non-inverting 1-to-2 Demultiplexer with 3-state Deselected
Non−inverting 1−to−2 Demultiplexer with 3-state Deselected
Octal Buffers/Drivers With 3-State Outputs
Octal Bus Transceivers With 3-State Outputs
Octal Transparent D-Type Latches
Octal buffer/line driver; 3-state
Quadruple 2-Input AND Gates
Quadruple 2-Input Exclusive-Or Gates
Quadruple 2-Input Positive-AND Gates
Quadruple 2-Input Positive-NAND Gates
Quadruple 2-Input XOR Gates
Quadruple Bus Buffer Gate With 3-State Outputs
Quadruple Non-Inverting Buffer, Active L
Single 2-Input AND Gate
Single 2-Input AND Gate with Open Drain Output
Single 2-Input Exclusive-OR Gate
Single 2-Input Exclusive−OR Gate
Single 2-Input NAND Gate
Single 2-Input NAND Gate With Schmitt-Trigger Inputs
Single 2-Input NAND Gate with Open Drain Output
Single 2-Input NOR Gate
Single 2-Input OR Gate
Single 2-Input Positive-NAND Gate
Single 2-Input XOR Gate
Single 2-input Exclusive-OR Gate
Single 2-input Exclusive−OR Gate
Single 2-input NAND Gate
Single 2−Input AND Gate
Single 2−Input NOR Gate
Single 2−input AND Gate
Single 2−input NAND Gate with Open Drain
Single 2−input NOR Gate
Single 2−input OR Gate
Single 3-Input AND Gate
Single 3-Input OR Gate
Single 3-Input Positive AND-OR Gate
Single 3-Input Positive OR-AND Gate
Single 3-Input Positive-AND Gate
Single 3-Input Positive-NAND Gate
Single 3-input Positive-NAND Gate
Single Buffer
Single Buffer Gate
Single Bus Buffer Gate With 3-State Output
Single Bus Buffer Gate with 3-State Output
Single Channel 2-Input Nand Gate
Single D-Type Flip-Flop with Asynchronous Clear
Single D-type Flip-Flop with Reset; Positive-Edge Trigger
Single D-type flip-flop; positive-edge trigger
Single Inverter
Single Inverter Gate
Single Inverter with Open Drain Output
Single Inverter with Schmitt Trigger
Single Non-Inverting Buffer Active H
Single Non-Inverting Buffer Active L
Single Non-Inverting Buffer Open Drain
Single Non-Inverting Buffer with Open Drain Output
Single Non-Inverting Buffer, Active L
Single Non-Inverting Schmitt Trigger Buffer
Single Non-inverting Buffer with 3-state Output
Single Non−Inverting Buffer with 3-state Output
Single Non−Inverting Buffer with Open Drain Output
Single Non−Inverting Schmitt Trigger Buffer
Single Non−inverting Buffer with 3-state Output
Single Non−inverting Buffer with Open Drain Output
Single Non−inverting Schmitt Trigger Buffer
Single Positive Edge Triggers The D-Trigger
Single Positive-Edge-Triggered D-Type Flip-Flop
Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
Single Schmitt Trigger Buffer
Single-Way Rising Edge Trigger Class D Trigger with Zero Clear And Preset Functions
Triple Schmitt-Trigger Buffer
Package
请选择
请选择
DFN6
DFN8
MSOP8
QFN20/TSSOP20
QFN20/TSSOP20/SOIC-20
QFN20; TSSOP20
SC70-5
SC70-5/DFN6
SC70-5/SOT23-5
SC70-5/SOT23-5/ DFN6
SC70-5/SOT23-5/DFN6
SC70-6
SC70-6*; SOT23-6*;DFN6(1×1.5)*
SC70-6/DFN6
SC70-6/SOT23-6
SC70-6/SOT23-6/DFN6
SOP14
SOP14/TSSOP14
SOP14/TSSOP14/DIP14
SOP14; TSSOP14
SOP14;TSSOP14*
SOP16
SOP16/TSSOP16/DIP16
SOP16; TSSOP16; DIP16
SOP8/TSSOP8
SOT23-5
SOT23-5;SC70-5*
SOT23-5;SC70-5;DFN6(1×1.5)*
SOT23-5;SC70-5
SOT23-6
SOT23-6 SC70-6
SOT23-6/SC70-6
SOT23-6;SC70-6
SSOP8/VSSOP8
TSSOP14
TSSOP14;SOP14;QFN14
TSSOP14,SOP14
TSSOP16
TSSOP16; SOP16
TSSOP16; SOP16*
TSSOP20
TSSOP20/SOP20
TSSOP20;SOP20
VSSOP8
VSSOP8/MSOP8
VSSOP8/SSOP8
ET74LVC1G126 1.65~5.5 <10 Single Non-Inverting Buffer Active H SC70-5/SOT23-5/DFN6
ET74LVC1G17 1.65~5.5 <10 Single Schmitt Trigger Buffer SC70-5/SOT23-5
ET74LVC1G125 1.65~5.5 <10 Single Non-Inverting Buffer, Active L SC70-5/SOT23-5/DFN6
ET74LVC1G04 1.65~5.5 <10 Single Inverter Gate SC70-5/SOT23-5/DFN6
ET74LVC1G08 1.65~5.5 <10 Single 2-Input AND Gate SC70-5/SOT23-5/DFN6
ET74AUP2G07 ET74AUP2G07 0.8~3.6 -0.7~0.7 Dual Buffer with Open Drain Output SC70-6/SOT23-6/DFN6
ET74AUP1G07 ET74AUP1G07 0.8~3.6 -0.7~0.7 Single Non-Inverting Buffer with Open Drain Output SC70-5/SOT23-5/DFN6
通用模型 ET74AUP1G02 0.8~3.6 -0.7~0.7 Single 2-Input NOR Gate SC70-5/SOT23-5/DFN6
ET74AHCT1G08 ET74AHCT1G08 4.5~5.5 <10 Single 2−Input AND Gate SC70-5/SOT23-5
ET74AHC1G17 ET74AHC1G32 2.0~5.5 <40 Single 2−input OR Gate SC70-5/SOT23-5/DFN6
ET74LVC125A 1.65~5.5 <10 Quadruple Non-Inverting Buffer, Active L TSSOP14
ET74LVC08A 1.65~5.5 <10 Quadruple 2-Input Positive-AND Gates TSSOP14
通用模型 ET74LVC2G241 1.65~5.5 <10 Dual Buffer Driver With 3-State Outputs VSSOP8
通用模型 ET74LVC2G126 1.65~5.5 <10 Dual Bus Buffer Gate With 3-State Outputs VSSOP8
通用模型 ET74LVC2G125 1.65~5.5 <10 Dual Bus Buffer Gate With 3-State Outputs VSSOP8
通用模型 ET74LVC2G16 1.65~5.5 / Dual buffer gate SC70-6*; SOT23-6*;DFN6(1×1.5)*
ET74LVC1G175 1.65~5.5 <10 Single D-Type Flip-Flop with Asynchronous Clear SOT23-6/SC70-6
ET74LVC1G74 1.65~5.5 <10 Single-Way Rising Edge Trigger Class D Trigger with Zero Clear And Preset Functions MSOP8
通用模型 ET74HCT125 4.5~5.5 / Quadruple Bus Buffer Gate With 3-State Outputs TSSOP14;SOP14;QFN14
ET74HCT541 4.5~5.5 <10 Octal Buffers/Drivers With 3-State Outputs TSSOP20
ET74LVC00AM14 1.65~5.5 <10 Quadruple 2-Input Positive-NAND Gates SOP14
通用模型 ET74HCT08 4.5~5.5 / Quadruple 2-Input Positive-AND Gates TSSOP14,SOP14
ET74HCT86 4.5~5.5 <10 Quadruple 2-Input XOR Gates SOP14/TSSOP14
通用模型 ET74HCT00 4.5~5.5 / Quadruple 2-Input Positive-NAND Gates TSSOP14,SOP14
ET74HC573 2.0~6.0 <10 Octal Transparent D-Type Latches TSSOP20
通用模型 ET74HC541 2.0~6.0 / Octal Buffers/Drivers With 3-State Outputs TSSOP20;SOP20
ET74HC86 2~5.5 <10 Quadruple 2-Input Exclusive-Or Gates SOP14
通用模型 ET74HC2G241 2.0~6.0 <10 Dual Buffer Driver With 3-State Outputs VSSOP8
通用模型 ET74HC2G240 2.0~6.0 <10 Dual Buffer Driver With 3-State Outputs VSSOP8
通用模型 ET74HC2G126 2.0~6.0 <10 Dual Bus Buffer Gate With 3-State Outputs VSSOP8
通用模型 ET74HC2G125 2.0~6.0 <10 Dual Bus Buffer Gate With 3-State Outputs VSSOP8
通用模型 ET74HC2G16 2.0~6.0 / Dual buffer gate SC70-6*; SOT23-6*;DFN6(1×1.5)*
通用模型 ET74HC1G175 2~6 / Single D-type Flip-Flop with Reset; Positive-Edge Trigger SOT23-6 SC70-6
通用模型 ET74HC1G80 2~6 / Single Positive-Edge-Triggered D-Type Flip-Flop SOT23-5;SC70-5*
通用模型 ET74HC1G79 2~6 / Single Positive-Edge-Triggered D-Type Flip-Flop SOT23-5;SC70-5
通用模型 ET74HC1G74 2~6 / Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset MSOP8
通用模型 ET74AHCT541 4.5~5.5 / Octal Buffers/Drivers With 3-State Outputs TSSOP20
通用模型 ET74AHCT86 4.5~5.5 / Quadruple 2-Input XOR Gates SOP14;TSSOP14*
通用模型 ET74AHCT125 4.5~5.5 / Quadruple Bus Buffer Gate With 3-State Outputs TSSOP14;SOP14;QFN14
通用模型 ET74AHCT08 4.5~5.5 / Quadruple 2-Input Positive-AND Gates TSSOP14,SOP14
通用模型 ET74AHCT00 4.5~5.5 / Quadruple 2-Input Positive-NAND Gates TSSOP14,SOP14
通用模型 ET74AHC2G241 2.0~5.5 <10 Dual Buffer Driver With 3-State Outputs VSSOP8
通用模型 ET74AHC86 2~5.5 / Quadruple 2-Input XOR Gates SOP14;TSSOP14*
通用模型 ET74AHC2G240 2.0~5.5 <10 Dual Buffer Driver With 3-State Outputs VSSOP8
通用模型 ET74AHC2G126 2.0~5.5 <10 Dual Bus Buffer Gate With 3-State Outputs VSSOP8
通用模型 ET74AHC2G125 2.0~5.5 <10 Dual Bus Buffer Gate With 3-State Outputs VSSOP8
通用模型 ET74AHC2G16 2.0~5.5 / Dual buffer gate SC70-6*; SOT23-6*;DFN6(1×1.5)*
通用模型 ET74AHC1G175 2~5.5 / Single D-type Flip-Flop with Reset; Positive-Edge Trigger SOT23-6;SC70-6
通用模型 ET74AHC1G132 2~5.5 / Single 2-Input NAND Gate With Schmitt-Trigger Inputs SOT23-5;SC70-5;DFN6(1×1.5)*
通用模型 ET74AHC1G80 2~5.5 / Single Positive-Edge-Triggered D-Type Flip-Flop SOT23-5;SC70-5*
通用模型 ET74AHC1G79 2~5.5 / Single Positive-Edge-Triggered D-Type Flip-Flop SOT23-5;SC70-5
通用模型 ET74AHC1G74 2~5.5 / Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset MSOP8
通用模型 74HC238 2.0~6.0 / 3-To-8 Line Decoder/Demultiplexer TSSOP16; SOP16*
通用模型 74HC138 2.0~6.0 / 3-To-8 Line Decoder/Demultiplexer TSSOP16; SOP16
通用模型 74HC164 2.0~6.0 / 8-Bit Parallel-Out Serial Shift Registers SOP14; TSSOP14
ET74AUP1G08_ET74AUP1G08N ET74AUP1G08 0.8~3.6 <10 Low-Power Single 2-Input AND Gate SC70-5/DFN6
通用模型 74HC595 2.0~6.0 / 8-Bit Shift Registers with Output Latches SOP16; TSSOP16; DIP16
ET74LCX244 2.3~5.5 <10 8-Ch Buffers With 3-State Outputs QFN20/TSSOP20/SOIC-20
通用模型 ET74LV4T86 1.65~5.5 / Quadruple 2-Input XOR Gates SOP14;TSSOP14*
通用模型 ET74LVC1G132 1.65~5.5 / Single 2-Input NAND Gate With Schmitt-Trigger Inputs SOT23-5;SC70-5;DFN6(1×1.5)*
通用模型 74HC245 2.0~6.0 / Octal Bus Transceivers With 3-State Outputs QFN20; TSSOP20
通用模型 ETQ74LVC2G00 1.65~5.5 <20 Dual 2-Input Positive-NAND Gate VSSOP8/MSOP8
通用模型 ETQ74AHCT1G07 4.5~5.5 <10 Single Non-Inverting Buffer with Open Drain Output SC70-5/SOT23-5/DFN6
通用模型 ET74LV1T17 1.6~5.5 <40 Single Non-Inverting Schmitt Trigger Buffer SC70-5/SOT23-5/DFN6
通用模型 ET74HCT1G19 2.0~6.0 <10 1-of-2 Demultiplexer / Decoder SC70-6/SOT23-6/DFN6
通用模型 ET74HCT1G14 2.0~5.5 <40 Single Inverter with Schmitt Trigger SC70-5/SOT23-5/DFN6
通用模型 ET74AUP1G38 0.8~3.6 <10 Single 2-Input NAND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
通用模型 ET74AUP1G09 0.8~3.6 <10 Single 2-Input AND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
通用模型 ET74AUP1G06 0.8~3.6 <10 Single Inverter with Open Drain Output SC70-5/SOT23-5/DFN6
通用模型 ET74AHCT2G34 4.5~5.5 <10 Dual Buffer SC70-6/SOT23-6/DFN6
通用模型 ET74AHCT1G19 4.5~5.5 <40 1-of-2 Demultiplexer / Decoder SC70-6/SOT23-6/DFN6
通用模型 ET74AHCT1G14 2.0~5.5 <40 Single Inverter with Schmitt Trigger SC70-5/SOT23-5/DFN6
通用模型 ET74AHC1G27 2.0~5.5 <10 3-Input Positive-NOR Gate SC70-6/SOT23-6/DFN6
通用模型 ETQ74AUP1G17 0.8~3.6 -3~3 Single Non-Inverting Schmitt Trigger Buffer SC70-5/SOT23-5/DFN6
ETQ74LVC2G04 1.65~5.5 <10 Dual Inverter SC70-6/SOT23-6/DFN6
ETQ74LVC1G126 1.65~5.5 <10 Driver with 3-State Output SC70-5/SOT23-5/DFN6
ETQ74LVC1G125 1.65~5.5 <10 Single Non-Inverting Buffer, Active L SC70-5/SOT23-5/DFN6
ETQ74LVC1G32 1.65~5.5 <10 Single 2-Input OR Gate SC70-5/SOT23-5/DFN6
ETQ74LVC1G14 1.65~5.5 <10 Single Inverter with Schmitt Trigger SC70-5/SOT23-5/DFN6
通用模型 ETQ74LVC1G11 1.65~5.5 <4 Single 3-Input AND Gate SC70-6/SOT23-6/DFN6
通用模型 ETQ74LVC1G07 1.65~5.5 <4 Single Non-Inverting Buffer with Open Drain Output SOT23-5
ETQ74LVC1G08 1.65~5.5 <10 Single 2-Input AND Gate SC70-5
ETQ74LVC1G04 1.65~5.5 <10 Single Inverter Gate SC70-5/SOT23-5/DFN6
ETQ74LVC1G02 1.65~5.5 <10 Single 2-Input NOR Gate SC70-5/SOT23-5/DFN6
ETQ74LVC1G00 1.65~5.5 <10 Single Channel 2-Input Nand Gate SC70-5/SOT23-5/DFN6
通用模型 ETQ74LV1T02 1.6~5.5 <10 Single 2-Input NOR Gate SC70-5
ETQ74HCT1G125 ETQ74HCT1G125 2.0~5.5 <10 Single Bus Buffer Gate with 3-State Output SC70-5/SOT23-5/DFN6
ETQ74AHCT1G08 2.0~5.5 <10 2-input AND gate SC70-5/SOT23-5/DFN6
通用模型 ET74LVC34A 1.65~5.5 <10 Hex Non-Inverting Buffer SOP14/TSSOP14
ET74LVC17A ET74LVC17A 1.65~5.5 <10 Hex Schmitt-Triggered Buffer SOP14/TSSOP14
ET74LVC14A 1.65~5.5 <10 Hex Schmitt trigger inverter SOP14/TSSOP14
通用模型 ET74LVC07A 1.65~5.5 <10 Hex inverter buffer/driver With open drain outputs SOP14/TSSOP14
通用模型 ET74LVC06A 1.65~5.5 <40 Hex Inverter Buffer and Driver With Open-Drain Outputs SOP14/TSSOP14
ET74LVC04A ET74LVC04A 1.65~5.5 10 Hex Inverters SOP14/TSSOP14
ET74LVC2G86 ET74LVC2G86 1.65~5.5 <4 Dual 2-Input XOR Gate VSSOP8
ET74LVC2G38 1.65~5.5 <10 Dual 2-Input NAND Gate With Open-Drain Outputs VSSOP8/SSOP8
ET74LVC2G34 1.65~5.5 <10 Dual Buffer Gate SC70-6/DFN6
通用模型 ET74LVC2G32 1.65~5.5 <4 Dual 2-Input Positive-OR Gate VSSOP8
ET74LVC2G17 1.65~5.5 <10 Dual Schmitt Trigger Buffer SC70-6
ET74LVC2G14 1.65~5.5 <10 Dual Inverter with Schmitt Trigger SC70-6
ET74LVC2G08 1.65~5.5 <10 Dual 2-Input Positive-AND Gate SSOP8/VSSOP8
ET74LVC2G07 1.65~5.5 <10 Dual Buffer with Open Drain Output SC70-6
ET74LVC2G06 ET74LVC2G06 1.65~5.5 <4 Dual Inverter with Open Drain Output SC70-6/SOT23-6/DFN6
ET74LVC2G04 1.65~5.5 <10 Dual Inverter Gate SC70-6/DFN6
通用模型 ET74LVC2G02 1.65~5.5 <10 Dual 2-Input NOR Gate VSSOP8/MSOP8
ET74LVC2G00 ET74LVC2G00 1.65~5.5 <4 Dual 2-Input Positive-NAND Gate VSSOP8/MSOP8
通用模型 ET74LVC1G0832 1.65~5.5 <10 Single 3-Input Positive AND-OR Gate SC70-6/SOT23-6
ET74LVC1G332 ET74LVC1G332 1.65~5.5 <4 Single 3-Input OR Gate SOT23-6
通用模型 ET74LVC1G98 1.65~5.5 <4 Low-Power Configurable Multiple Function Gate SC70-6/SOT23-6
ET74LVC1G97 ET74LVC1G97 1.65~5.5 <4 Low-power Configurable Multiple Function Gate SC70-6/SOT23-6/DFN6
ET74LVC1G86 1.65~5.5 <10 Single 2-Input XOR Gate SC70-5/SOT23-5/DFN6
ET74LVC1G58 1.65~5.5 <10 Low-Power Configurable Multiple Function Gate SOT23-6
ET74LVC1G57 1.65~5.5 <10 Configurable Multiple Function Gate DFN6
通用模型 ET74LVC1G38 1.65~5.5 <10 Single 2−input NAND Gate with Open Drain SC70-5/SOT23-5/DFN6
ET74LVC1G34 1.65~5.5 <10 Single Buffer Gate SC70-5
ET74LVC1G32 1.65~5.5 <10 Single 2-Input OR Gate SC70-5/DFN6
通用模型 ET74LVC1G27 1.65~5.5 <10 3-Input Positive-NOR Gate SC70-6/SOT23-6/DFN6
ET74LVC1G19 1.65~5.5 <10 1-of-2 Decoder and Demultiplexer SC70-5/SOT23-5/DFN6
通用模型 ET74LVC1G18 1.65~5.5 <10 Non−inverting 1−to−2 Demultiplexer with 3-state Deselected SC70-6/SOT23-6/DFN6
ET74LVC1G14 1.65~5.5 <10 Single Inverter with Schmitt Trigger SC70-5/SOT23-5
通用模型 ET74LVC1G11 1.65~5.5 <4 Single 3-Input Positive-AND Gate SC70-6/SOT23-6/DFN6
ET74LVC1G10 ET74LVC1G10 1.65~5.5 <4 Single 3-input Positive-NAND Gate SC70-6/SOT23-6/DFN6
通用模型 ET74LVC1G09 1.65~5.5 <10 Single 2-Input AND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
ET74LVC1G07 1.65~5.5 <10 Single Non-Inverting Buffer Open Drain SC70-5/SOT23-5/DFN6
ET74LVC1G06 1.65~5.5 <10 Single Inverter with Open Drain Output SC70-5
ET74LVC1G02 1.65~5.5 <10 Single 2-Input NOR Gate SC70-5/DFN6
ET74LVC1G00 1.65~5.5 <10 Single Channel 2-Input Nand Gate SC70-5/DFN6
通用模型 ET74LV2T34 1.6~5.5 <10 Dual Buffer SC70-6/SOT23-6/DFN6
通用模型 ET74LV2T17 1.6~5.5 <10 Dual Buffer with Schmitt-Trigger Inputs SC70-6/SOT23-6/DFN6
通用模型 ET74LV2T14 1.6~5.5 <10 Dual Inverter with Schmitt-Trigger Inputs SC70-6/SOT23-6/DFN6
ET74LV2T07 ET74LV2T07 1.6~5.5 <10 Dual Buffer with Open Drain Output SC70-6/SOT23-6/DFN6
ET74LV2T06 ET74LV2T06 1.6~5.5 <10 Dual Inverter with Open Drain Output SC70-6/SOT23-6/DFN6
通用模型 ET74LV2T04 1.6~5.5 <10 Dual Inverter Gate SC70-6/SOT23-6/DFN6
ET74LV1T125 ET74LV1T125 1.6~5.5 <10 Single Non−Inverting Buffer with 3-state Output SC70-5/SOT23-5/DFN6
ET74LV1T86 ET74LV1T86 1.6~5.5 <10 Single 2-Input Exclusive−OR Gate SC70-5/SOT23-5/DFN6
ET74LV1T126 ET74LV1T126 1.6~5.5 <10 Single Non-inverting Buffer with 3-state Output SC70-5/SOT23-5/ DFN6
通用模型 ET74LV1T38 1.6~5.5 <10 Single 2-Input NAND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
通用模型 ET74LV1T32 1.6~5.5 <10 Single 2-Input OR Gate SC70-5/SOT23-5/DFN6
通用模型 ET74LV1T19 1.6~5.5 <10 1-of-2 Demultiplexer / Decoder SC70-6/SOT23-6/DFN6
通用模型 ET74LV1T18 1.6~5.5 <10 Non-inverting 1-to-2 Demultiplexer with 3-state Deselected SC70-6/SOT23-6/DFN6
通用模型 ET74LV1T14 1.6~5.5 <10 Single Inverter with Schmitt Trigger SC70-5/SOT23-5/DFN6
通用模型 ET74LV1T09 1.6~5.5 <10 Single 2-Input AND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
ET74LV1T08 ET74LV1T08 1.6~5.5 <10 Single 2−Input AND Gate SC70-5/SOT23-5
ET74LV1T07 ET74LV1T07 1.6~5.5 <10 Single Non−Inverting Buffer with Open Drain Output SC70-5/SOT23-5/DFN6
ET74LV1T06 ET74LV1T06 1.6~5.5 <10 Single Inverter with Open Drain Output SC70-5/SOT23-5/DFN6
ET74LV1T04 ET74LV1T04 1.6~5.5 <10 Single 2−Input NOR Gate SC70-5/SOT23-5/DFN6
ET74LV1T02 ET74LV1T02 1.6~5.5 <10 Single 2−Input NOR Gate SC70-5/SOT23-5/DFN6
ET74LV1T00 ET74LV1T00 1.6~5.5 <10 Single 2-Input NAND Gate SC70-5/SOT23-5/DFN6
ET74HCT2G34 ET74HCT2G34 4.5~5.5 <10 Dual Buffer SC70-6/SOT23-6/DFN6
通用模型 ET74HCT2G17 4.5~5.5 <10 Dual Buffer with Schmitt-Trigger Inputs SC70-6/SOT23-6/DFN6
通用模型 ET74HCT2G14 4.5~5.5 <10 Dual Inverter with Schmitt-Trigger Inputs SC70-6/SOT23-6/DFN6
ET74HCT2G07 ET74HCT2G07 4.5~5.5 <10 Dual Buffer with Open Drain Output SC70-6/SOT23-6/DFN6
ET74HCT2G06 ET74HCT2G06 4.5~5.5 <10 Dual Inverter with Open Drain Output SC70-6/SOT23-6/DFN6
通用模型 ET74HCT2G04 4.5~5.5 <10 Dual Inverter Gate SC70-6/SOT23-6/DFN6
ET74HCT1G126 ET74HCT1G126 4.5~5.5 <10 Single Bus Buffer Gate with 3-State Output SC70-5/SOT23-5/DFN6
ET74HCT1G125 ET74HCT1G125 4.5~5.5 <10 Single Bus Buffer Gate with 3-State Output SC70-5/SOT23-5/DFN6
通用模型 ET74HCT1G86 4.5~5.5 <10 Single 2-Input Exclusive-OR Gate SC70-5/SOT23-5/DFN6
通用模型 ET74HCT1G38 4.5~5.5 <10 Single 2-Input NAND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
通用模型 ET74HCT1G34 4.5~5.5 <10 Single Buffer SC70-5/SOT23-5/DFN6
ET74HCT1G32 ET74HCT1G32 4.5~5.5 <10 Single 2-Input OR Gate SC70-5/SOT23-5/DFN6
通用模型 ET74HCT1G18 4.5~5.5 <10 Non-inverting 1-to-2 Demultiplexer with 3-state Deselected SC70-6/SOT23-6/DFN6
通用模型 ET74HCT1G17 4.5~5.5 <10 Single Non-Inverting Schmitt Trigger Buffer SC70-5/SOT23-5/DFN6
通用模型 ET74HCT1G09 4.5~5.5 <10 Single 2-Input AND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
ET74HCT1G08 ET74HCT1G08 4.5~5.5 <10 Single 2−Input AND Gate SC70-5/SOT23-5
ET74HCT1G07 ET74HCT1G07 4.5~5.5 <10 Single Non−Inverting Buffer with Open Drain Output SC70-5/SOT23-5/DFN6
ET74HCT1G06 ET74HCT1G06 4.5~5.5 <10 Single Inverter with Open Drain Output SC70-5/SOT23-5/DFN6
ET74HCT1G04 ET74HCT1G04 4.5~5.5 <10 Single Inverter SC70-5/SOT23-5/DFN6
ET74HCT1G02 ET74HCT1G02 4.5~5.5 <10 Single 2−Input NOR Gate SC70-5/SOT23-5/DFN6
ET74HCT1G00 ET74HCT1G00 4.5~5.5 <10 Single 2-Input NAND Gate SC70-5/SOT23-5/DFN6
通用模型 ET74HC34 2.0~6.0 <20 Hex Non-Inverting Buffer SOP14/TSSOP14
通用模型 ET74HC17 2.0~6.0 <20 Hex Schmitt-Triggered Buffer SOP14/TSSOP14
ET74HC14 2.0~6.0 <10 Hex Inverter with Schmitt Trigger SOP14/TSSOP14
通用模型 ET74HC07 2.0~6.0 <10 Hex Buffer and Driver With Open-Drain Outputs SOP14/TSSOP14
通用模型 ET74HC06 2.0~6.0 <10 Hex Inverter Buffer and Driver With Open-Drain Outputs SOP14/TSSOP14
ET74HC2G86 ET74HC2G86 2.0~6.0 <20 Dual 2-Input XOR Gate VSSOP8
ET74HC04 2.0~6.0 <10 Hex Inverters SOP14/TSSOP14/DIP14
通用模型 ET74HC2G38 2.0~6.0 -1.0~1.0 Dual 2-Input NAND Gate With Open-Drain Outputs VSSOP8/MSOP8
ET74HC2G34 ET74HC2G34 2.0~6.0 <10 Dual Buffer SC70-6/SOT23-6/DFN6
通用模型 ET74HC2G32 2.0~6.0 <20 Dual 2-Input Positive-OR Gate VSSOP8/MSOP8
ET74HC2G17 ET74HC2G17 2.0~6.0 <10 Dual Buffer with Schmitt−Trigger Inputs SC70-6/SOT23-6/DFN6
通用模型 ET74HC2G08 2.0~6.0 <20 Dual 2-Input AND Gate VSSOP8/MSOP8
ET74HC2G07 ET74HC2G07 2.0~6.0 <10 Dual Buffer with Open Drain Output SC70-6/SOT23-6/DFN6
ET74HC2G06 ET74HC2G06 2.0~6.0 <10 Dual Inverter with Open Drain Output SC70-6/SOT23-6/DFN6
ET74HC2G04 ET74HC2G04 2.0~6.0 <10 Dual Inverter Gate SC70-6/SOT23-6/DFN6
通用模型 ET74HC2G02 2.0~6.0 <20 Dual 2-Input NOR Gate VSSOP8/MSOP8
通用模型 ET74HC2G00 2.0~6.0 <20 Dual 2-Input Positive-NAND Gate VSSOP8/MSOP8
ET74HC1G126 ET74HC1G126 2.0~6.0 <10 Single Non-inverting Buffer with 3-state Output SC70-5/SOT23-5/DFN6
ET74HC1G125 ET74HC1G125 2.0~6.0 <10 Single Non−inverting Buffer with 3-state Output SC70-5/SOT23-5/DFN6
ET74HC1G86 ET74HC1G86 2.0~6.0 <10 Single 2-input Exclusive−OR Gate SC70-5/SOT23-5/DFN6
通用模型 ET74HC1G38 2.0~6.0 <10 Single 2-Input NAND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
ET74HC1G34 ET74HC1G34 2.0~6.0 <10 Single Buffer SC70-5/SOT23-5/DFN6
ET74HC1G17 ET74HC1G32 2.0~6.0 <10 Single 2−input OR Gate SC70-5/SOT23-5/DFN6
通用模型 ET74HC1G19 2.0~6.0 <10 1-of-2 Demultiplexer / Decoder SC70-6/SOT23-6/DFN6
通用模型 ET74HC1G18 2.0~6.0 <10 Non-inverting 1-to-2 Demultiplexer with 3-state Deselected SC70-6/SOT23-6/DFN6
ET74HC1G17 ET74HC1G17 2.0~6.0 <10 Single Non−inverting Schmitt Trigger Buffer SC70-5/SOT23-5/DFN6
ET74HC1G07 ET74HC1G14 2.0~6.0 <10 Single Inverter with Schmitt Trigger SC70-5/SOT23-5/DFN6
通用模型 ET74HC1G09 2.0~6.0 <10 Single 2-Input AND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
ET74HC1G07 ET74HC1G08 2.0~6.0 <10 Single 2−input AND Gate SC70-5/SOT23-5/DFN6
ET74HC1G07 ET74HC1G07 2.0~6.0 <10 Single Non−inverting Buffer with Open Drain Output SC70-5/SOT23-5/DFN6
ET74HC1G06 ET74HC1G06 2.0~6.0 <10 Single Inverter with Open Drain Output SC70-5/SOT23-5/DFN6
ET74HC1G00 ET74HC1G00 2.0~6.0 <10 Single 2-Input NAND Gate SC70-5/SOT23-5/ DFN6
ET74HC1G04 ET74HC1G04 2.0~6.0 <10 Single Inverter SC70-5/SOT23-5/DFN6
ET74HC1G02 ET74HC1G02 2.0~6.0 <10 Single 2−input NOR Gate SC70-5/SOT23-5/DFN6
ET74AUP2G34 0.8~3.6 <10 Low-Power Dual Buffer gate SC70-6/SOT23-6/DFN6
ET74AUP2G17 0.8~3.6 <10 Low-Power Dual Schmitt trigger buffer SC70-6/SOT23-6/DFN6
ET74AUP2G14 0.8~3.6 <10 Low-Power Dual Inverter with Schmitt trigger SC70-6/SOT23-6/DFN6
ET74AUP2G04 0.8~3.6 <10 Low-Power Dual Inverter Gate SC70-6/SOT23-6/DFN6
ET74AUP1G126 0.8~3.6 <10 Low-Power Single Bus Buffer Gate With 3-State Output SC70-6/SOT23-6/DFN6
ET74AUP1G125 0.8~3.6 <10 Single Non-Inverting Buffer Active L SOT23-5
通用模型 ET74AUP1G86 0.8~3.6 -0.7~0.7 Single 2-input Exclusive-OR Gate SC70-5/SOT23-5/DFN6
ET74AUP1G34 0.8~3.6 <10 Low-Power Single Buffer Gate SC70-5/SOT23-5/DFN6
ET74AUP1G32_ET74AUP1G32N ET74AUP1G32 0.8~3.6 <10 Low-Power Single 2-Input OR Gate SC70-5/DFN6
通用模型 ET74AUP1G19 0.8~3.6 -0.7~0.7 1-of-2 Demultiplexer / Decoder SC70-6/SOT23-6/DFN6
通用模型 ET74AUP1G18 0.8~3.6 -0.7~0.7 Non-inverting 1-to-2 Demultiplexer with 3-state Deselected SC70-6/SOT23-6/DFN6
ET74AUP1G17 0.8~3.6 <10 Low-Power Single Schmitt-Trigger Buffer SC70-5/SOT23-5/DFN6
ET74AUP1G14 0.8~3.6 <10 Low-Power Single Schmitt-Trigger Inverter SC70-5/SOT23-5/DFN6
ET74AUP1G00 0.8~3.6 <10 Single 2-Input Positive-NAND Gate SC70-5/SOT23-5/DFN6
通用模型 ET74AHCT2G17 4.5~5.5 <10 Dual Buffer with Schmitt-Trigger Inputs SC70-6/SOT23-6/DFN6
通用模型 ET74AHCT2G14 4.5~5.5 <10 Dual Inverter with Schmitt-Trigger Inputs SC70-6/SOT23-6/DFN6
ET74AHCT2G07 ET74AHCT2G07 4.5~5.5 <10 Dual Buffer with Open Drain Output SC70-6/SOT23-6/DFN6
ET74AHCT2G06 ET74AHCT2G06 4.5~5.5 <10 Dual Inverter with Open Drain Output SC70-6/SOT23-6/DFN6
通用模型 ET74AHCT2G04 4.5~5.5 <10 Dual Inverter Gate SC70-6/SOT23-6/DFN6
ET74AHCT1G125 ET74AHCT1G125 4.5~5.5 <10 Single Bus Buffer Gate With 3-State Output SC70-5/SOT23-5/ DFN6
通用模型 ET74AHCT1G86 4.5~5.5 <10 Single 2-Input Exclusive-OR Gate SC70-5/SOT23-5/DFN6
通用模型 ET74AHCT1G38 4.5~5.5 <10 Single 2-Input NAND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
通用模型 ET74AHCT1G34 4.5~5.5 <10 Single Buffer SC70-5/SOT23-5/DFN6
通用模型 ET74AHCT1G32 4.5~5.5 <10 Single 2-Input OR Gate SC70-5/SOT23-5/DFN6
通用模型 ET74AHCT1G18 4.5~5.5 <10 Non-inverting 1-to-2 Demultiplexer with 3-state Deselected SC70-6/SOT23-6/DFN6
通用模型 ET74AHCT1G17 4.5~5.5 <10 Single Non-Inverting Schmitt Trigger Buffer SC70-5/SOT23-5/DFN6
通用模型 ET74AHCT1G09 4.5~5.5 <10 Single 2-Input AND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
ET74AHCT1G06 ET74AHCT1G06 4.5~5.5 <10 Single Inverter with Open Drain Output SC70-5/SOT23-5/DFN6
ET74AHCT1G04 ET74AHCT1G04 4.5~5.5 <10 Single Inverter SC70-5/SOT23-5/DFN6
ET74AHCT1G02 ET74AHCT1G02 4.5~5.5 <10 Single 2−Input NOR Gate SC70-5/SOT23-5/DFN6
ET74AHCT1G00 ET74AHCT1G00 4.5~5.5 <10 Single 2-Input NAND Gate SC70-5/SOT23-5/DFN6
通用模型 ET74AHC34 2.0~5.5 <40 Hex Non-Inverting Buffer SOP14/TSSOP14
通用模型 ET74AHC17 2.0~5.5 <40 Hex Schmitt-Triggered Buffer SOP14/TSSOP14
通用模型 ET74AHC14 2.0~5.5 <40 Hex Schmidt-Trigger Inverters SOP14/TSSOP14/DIP14
通用模型 ET74AHC07 2.0~5.5 <10 Hex Buffer and Driver With Open-Drain Outputs SOP14/TSSOP14
通用模型 ET74AHC06 2.0~5.5 <40 Hex Inverter Buffer and Driver With Open-Drain Outputs SOP14/TSSOP14
ET74AHC04 ET74AHC04 2.0~5.5 1 Hex Inverters SOP14/TSSOP14
ET74AHC2G86 ET74AHC2G86 2.0~5.5 <10 Dual 2-Input XOR Gate VSSOP8
通用模型 ET74AHC2G38 2.0~5.5 <10 Dual 2-Input NAND Gate With Open-Drain Outputs VSSOP8/MSOP8
ET74AHC2G34 ET74AHC2G34 2.0~5.5 <40 Dual Buffer SC70-6/SOT23-6/DFN6
通用模型 ET74AHC2G32 2.0~5.5 <40 Dual 2-Input Positive-OR Gate VSSOP8/MSOP8
ET74AHC2G17 ET74AHC2G17 2.0~5.5 <40 Dual Buffer with Schmitt-Trigger Inputs SC70-6/SOT23-6/DFN6
ET74AHC2G07 ET74AHC2G07 2.0~5.5 <40 Dual Buffer with Open Drain Output SC70-6/SOT23-6/DFN6
ET74AHC2G04 ET74AHC2G04 2.0~5.5 <40 Dual Inverter Gate SC70-6/SOT23-6/DFN6
ET74AHC2G06 ET74AHC2G06 2.0~5.5 <10 Dual Inverter with Open Drain Output SC70-6/SOT23-6/DFN6
ET74AHC2G14 ET74AHC2G14 2.0~5.5 <40 Dual Inverter with Schmitt−Trigger Inputs SC70-6/SOT23-6/DFN6
通用模型 ET74AHC2G08 2.0~5.5 <40 Dual 2-Input AND Gate VSSOP8/MSOP8
通用模型 ET74AHC2G02 2.0~5.5 <40 Dual 2-Input NOR Gate VSSOP8/MSOP8
通用模型 ET74AHC2G00 2.0~5.5 <40 Dual 2-Input Positive-NAND Gate VSSOP8/MSOP8
ET74AHC1G3208 ET74AHC1G3208 2.0~5.5 <40 Single 3-Input Positive OR-AND Gate SC70-6/SOT23-6
通用模型 ET74AHC1G0832 2.0~5.5 <40 Single 3-Input Positive AND-OR Gate SC70-6/SOT23-6
ET74AHC1G332 ET74AHC1G332 2.0~5.5 <40 Single 3-Input OR Gate SOT23-6
ET74AHC1G125 ET74AHC1G126 2.0~5.5 <40 Single Non-inverting Buffer with 3-state Output SC70-5/SOT23-5/DFN6
ET74AHC1G125 ET74AHC1G125 2.0~5.5 <40 Single Non−inverting Buffer with 3-state Output SC70-5/SOT23-5/DFN6
通用模型 ET74AHC1G98 2.0~5.5 <4 Low-Power Configurable Multiple Function Gate SC70-6/SOT23-6
ET74AHC1G97 ET74AHC1G97 2.0~5.5 <4 Low-power Configurable Multiple Function Gate SC70-6/SOT23-6/DFN6
ET74AHC1G86 ET74AHC1G86 2.0~5.5 <40 Single 2-input Exclusive−OR Gate SC70-5/SOT23-5/DFN6
通用模型 ET74AHC1G58 2.0~5.5 <4 Low-Power Configurable Multiple Function Gate SC70-6/SOT23-6
通用模型 ET74AHC1G57 2.0~5.5 <4 Low-Power Configurable Multiple Function Gate SC70-6/SOT23-6/DFN6
通用模型 ET74AHC1G38 2.0~5.5 <40 Single 2-Input NAND Gate with Open Drain Output SC70-5/SOT23-5/DFN6
ET74AHC1G34 ET74AHC1G34 2.0~5.5 <40 Single Buffer SC70-5/SOT23-5/DFN6
通用模型 ET74AHC1G19 2.0~5.5 <40 1-of-2 Demultiplexer / Decoder SC70-6/SOT23-6/DFN6
ET74AHC1G17 ET74AHC1G17 2.0~5.5 <40 Single Non−inverting Schmitt Trigger Buffer SC70-5/SOT23-5/DFN6
ET74AHC1G14 ET74AHC1G14 2.0~5.5 <40 Single Inverter with Schmitt Trigger SC70-5/SOT23-5/DFN6
ET74AHC1G11 ET74AHC1G11 2.0~5.5 <10 Single 3-Input Positive-AND Gate SC70-6/SOT23-6/DFN6
通用模型 ET74AHC1G18 2.0~5.5 <40 Non-inverting 1-to-2 Demultiplexer with 3-state Deselected SC70-6/SOT23-6/DFN6
通用模型 ET74AHC1G10 2.0~5.5 <10 Single 3-Input Positive-NAND Gate SC70-6/SOT23-6/DFN6
通用模型 ET74AHC1G09 2.0~5.5 <40 Single 2-Input AND Gate with Open Drain Output SC70-5/SOT23-5/ DFN6
ET74AHC1G08 ET74AHC1G08 2.0~5.5 <40 Single 2−input AND Gate SC70-5/SOT23-5/DFN6
ET74AHC1G00 ET74AHC1G07 2.0~5.5 <40 Single Non−inverting Buffer with Open Drain Output SC70-5/SOT23-5/DFN6
ET74AHC1G00 ET74AHC1G04 2.0~5.5 <40 Single Inverter SC70-5/SOT23-5/DFN6
ET74AHC1G00 ET74AHC1G06 2.0~5.5 <10 Single Inverter with Open Drain Output SC70-5/SOT23-5/DFN6
ET74AHC1G00 ET74AHC1G02 2.0~5.5 <40 Single 2−input NOR Gate SC70-5/SOT23-5/DFN6
ET74AHC1G00 ET74AHC1G00 2.0~5.5 <40 Single 2-input NAND Gate SC70-5/SOT23-5/DFN6
通用模型 ET74AUP2G126 0.8~3.6 -0.7~0.7 Dual Bus Buffer Gate With 3-State Output DFN8
通用模型 ET74LVC2G240 1.65~5.5 <4 Dual Buffer Driver with 3-State Outputs VSSOP8
ET74LVC1G80 1.65~5.5 <10 Single Positive Edge Triggers The D-Trigger SOT23-5
ET74LVC1G3208 ET74LVC1G3208 1.65~5.5 <10 Single 3-Input Positive OR-AND Gate SC70-6/SOT23-6
ET74AUP2G06 ET74AUP2G06 0.8~3.6 -0.7~0.7 Dual Inverter with Open Drain Output SC70-6/SOT23-6/DFN6
ET74AHCT1G126 ET74AHCT1G126 4.5~5.5 <10 Single Bus Buffer Gate with 3-State Output SC70-5/SOT23-5/DFN6
ET74AHC1G16 ET74AHC1G16 2.0~5.5 <10 Single Buffer Gate SC70-5/SOT23-5
ET74LVC1G16 1.65~5.5 <10 Inverting Buffer with Schmitt-Trigger Input and Open-Drain Output SC70-5/DFN6
ET74AHCT1G07 ET74AHCT1G07 4.5~5.5 <10 Single Non−Inverting Buffer with Open Drain Output SC70-5/SOT23-5/DFN6
ET74AUP1G32_ET74AUP1G32N ET74AUP1G32N 0.8~3.6 <10 Low-Power Single 2-Input OR Gate SC70-5/DFN6
ET74AUP1G08_ET74AUP1G08N ET74AUP1G08N 0.8~3.6 <10 Low-Power Single 2-Input AND Gate SC70-5/DFN6
ET74LV541 2~5.5 <10 Octal Buffers/Drivers With 3-State Outputs TSSOP20
ET74LV1T34 ET74LV1T34 1.6~5.5 <10 Single Buffer SC70-5/SOT23-5/ DFN6
ETQ74LVC1G79 1.65~5.5 <10 Single D-type flip-flop; positive-edge trigger SC70-5
ETQ74LVC1G17 1.65~5.5 <10 Single Schmitt Trigger Buffer SC70-5
ETQ74AUP1G32 0.8~3.6 <10 Low-power 2-input OR-gate SC70-5/SOT23-5/DFN6
ET74HC2G14 ET74HC2G14 2.0~6.0 <10 Dual Inverter with Schmitt−Trigger Inputs SC70-6/SOT23-6/DFN6
ET74AUP1G32AM ET74AUP1G32AM 0.8~3.6 <3 Single 2−input OR Gate SC70-5
ET74HC238V ET74HC238V 2.0~6.0 <80 3 To 8 Line Decoder Demultiplexer TSSOP16
ET74HC245V ET74HC245V 2.0~6.0 <40 8 Bits Octal 3-State Non-Inverting Bus Transceiver TSSOP20
ET74HC138V ET74HC138V 2.0~6.0 <80 3-to-8 Decoder/Demultiplexer TSSOP16
ET74HC164V ET74HC164V 2.0~6.0 <80 8-bit Parallel-out Serial Shift Registers TSSOP14
ET74AHC08 ET74AHC08 1.65~5.5 1 Quadruple 2-Input AND Gates SOP14/TSSOP14
ET74HC595 2.0~6.0 <160 8-Bit Shift Registers With 3-State Output Registers SOP16/TSSOP16/DIP16
ET74LV541V ET74LV541V 2.0~5.5 <10 Octal Buffers/Drivers With 3-State Outputs TSSOP20
ET74AUP1G04 0.8~3.6 <10 Single Inverter Gate SC70-5/SOT23-5/DFN6
ET74HC245 2.0~6.0 <10 Octal Bus Transceivers With 3-State Outputs QFN20/TSSOP20
ETQ74HCT541 2.0~6.0 <10 Octal buffer/line driver; 3-state TSSOP20/SOP20
ET74LVCSZ17 1.65~5.5 <10 Single Non−Inverting Schmitt Trigger Buffer SC70-5
ET74LVC3G17 1.65~5.5 <10 Triple Schmitt-Trigger Buffer SOP8/TSSOP8
ET74LVC1G79 1.65~5.5 <10 Single Positive Edge Triggers The D-Trigger SOT23-5
ET74HC165 2.0~6.0 <10 8-Bit Parallel-Load Shift Registers SOP16
ET74HC164 2.0~6.0 <10 8-Bit Parallel-Out Serial Shift Registers SOP14/TSSOP14
ET74HC138_238 ET74HC138/238 2.0~6.0 <10 3-To-8 Line Decoder/Demultiplexer TSSOP16
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